|
ð 0000:00:02.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:02.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:02.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:02.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:02.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:02.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:02.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:02.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:03.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:04.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:05.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:06.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.0:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.1:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.2:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.3:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.4:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.5:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.6:pcie002
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:09.7:pcie002
|
-- |
drwxr-xr-x |
|
|
ð bind
|
4K |
--w------- |
|
|
ð uevent
|
4K |
--w------- |
|
|
ð unbind
|
4K |
--w------- |
|